an efficient and cost effective fpga based implementation of the viola-jones face detection algorithm

an efficient and cost effective fpga based implementation of the viola-jones face detection algorithm

;Peter Irgens;Curtis Bader;Theresa Lé;Devansh Saxena;Cristinel Ababei
language learning 2017 Vol. 1 pp. 68-75
199
irgens2017hardwarexan

Abstract

We present an field programmable gate arrays (FPGA) based implementation of the popular Viola-Jones face detection algorithm, which is an essential building block in many applications such as video surveillance and tracking. Our implementation is a complete system level hardware design described in a hardware description language and validated on the affordable DE2-115 evaluation board. Our primary objective is to study the achievable performance with a low-end FPGA chip based implementation. In addition, we release to the public domain the entire project. We hope that this will enable other researchers to easily replicate and compare their results to ours and that it will encourage and facilitate further research and educational ideas in the areas of image processing, computer vision, and advanced digital design and FPGA prototyping.

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ID: 194229
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194229
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10.1016/j.ohx.2017.03.002
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