This paper presents a feasibility study for a very high data rate receiver operating in the K/Ka-band suitable to future Moon exploration missions. The receiver specifications are outlined starting from the mission scenario and from a careful system analysis. The designed architecture uses a low noise front-end to down-convert the incoming K/Ka-band signal into a $3.7\mathrm{GHz}$ intermediate frequency (IF). For maximum flexibility, a software defined radio (SDR) is adopted for the I/Q demodulation and for the analog to digital conversion (ADC). The decoding operations and the data interface are carried out by a processor based on field programmable gate array (FPGA) circuits. To experimentally verify the above concepts, a preliminary front-end breadboard is implemented, operating between 27.5 and 30 GHz. The breadboard, which uses components off the shelf (COTS) and evaluation boards (EVBs), is characterized by a $46\mathrm{dB}$ gain, a $3.4\mathrm{dB}$ noise figure and a $-37\mathrm{dBm}$ input-referred 1 dB compression point. Finally, a $40\mathrm{Msym}/\mathrm{s}$ quadrature phase shift keying (QPSK) signal is demodulated by means of a commercially available SDR, demonstrating the above concept. The importance of these results is that they have been obtained exploiting a class of miniaturized and low cost microwave integrated circuits currently available on the market, opening the way to a dense communication infrastructure on cislunar space.