An Improved Graphene FET with Reduced Miller Capacitance Using Extended Gate Structure and Heterogeneous Oxide Dielectric
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An Improved Graphene FET with Reduced Miller Capacitance Using Extended Gate Structure and Heterogeneous Oxide Dielectric

Aadit, M.
2nd international conference on electrical and electronic engineering, iceee 2017 2018 pp. 1-4
162
aadit2018an2nd

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DOI:
10.1109/CEEE.2017.8412845

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ID: 44497
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